Xilinx Field Programmable Gate Array, Part #: XC5VSX50T-1FF665C | FPGA | DEX Box of 50 LNV:5M11H26854

LNV:5M11H26854

MT40A512M8SA-062E AAT:F

3GB/s(for 1333 MT/s dual channel) • Supports different physical mappings of bank addresses to optimize performance • Out-of-order request processing to increase performance • Aggressive power management to reduce power consumption • Proactive page closing policies to close unused pages

TMR3: 16-bit timer/counter

Xilinx Field Programmable Gate Array, Part #: XC5VSX50T-1FF665C | FPGA | DEX Box of 50 LNV:5M11H26854Xilinx Field Programmable Gate Array, Part #: XC5VSX50T 1FF665C builds on the success of the earlier Spartan IIE family by increasing the amount of logic resources, the capacity of internal RAM, the total number of I Os, and the overall level of performance as well as by improving clock management functions. Numerous enhancements derive from the Virtex II platform technology. These Spartan 3 FPGA enhancements, combined with advanced process